Introduction
This is used in Harvard and RISC-based processors to improve efficiency, and stop idle time in components.
FDE
Can make the FDE cycle much faster
Processor starts by fetching the first instruction
We can then fetch instruction 2, while instruction 1 is being decoded
We can then fetch 3, while 2 is being decoded, and 1 is being executed
This continues as part of the FDE cycle
Achievement
Without pipelining, the FDE would have to take in steps, 1 after the other
This means the processor isn't being used to its full potential
By using pipelining, the next instruction can be fetched, while the processor is executing previous instructions
This means we can make more efficient use of the registers and CPU cache and multiple parts of instructions can be used by different registers at the same time
Pipelining is often divided into instruction, and arithmetic pipelines
Flushing
A branch in code, i.e. an if-else statement, requires a jump to another memory address. This means the pipe needs to be flushed (cleared) of the previous data, in order to not execute the wrong code
Pipelining can improve efficiency, but with too much if else conditions, won't be able to be effective, because flushing must happen.