Introduction
An interrupt is a signal generated in one of three places:
- Hardware
- Software
- I/O
Picture the standard FDE Cycle:
Fetch -> Decode -> Execute -> Fetch ...
An interrupt would be checked for before Fetch, such as :
Interrupt -> Fetch -> Decode -> Execute.
An interrupt is its own FDE cycle, and can be anything, from a mouse/keyboard event, or a printer completing a task. An alternative would be polling which is a more inefficient approach, as it would check every component every tick of the CPU clock.
So how does an interrupt work then?
ISR (Interrupt Service Register)
At the start of each Fetch-Decode-Execute cycle, the processor checks the interrupt register for any pending interrupts.
If an interrupt exists and has a higher priority than the current process:
- The current contents of the special-purpose registers in the CPU are temporarily stored in a stack.
- The processor loads the appropriate Interrupt Service Routine (ISR) into RAM.
- A flag is set to indicate that the ISR has started.
Once the interrupt has been serviced:
- The flag is reset.
- The interrupt queue is checked again for any other higher-priority interrupts.
If additional higher-priority interrupts exist:
- The process repeats until all priority interrupts have been handled.
If no more high-priority interrupts exist:
- The contents of the stack are transferred back into the CPU registers.
- The Fetch-Decode-Execute cycle resumes as before.